Device Support Summary For "Cypress S25FL064LABNHV013 [Support pending samples]"

 
Generated by:BPWin V7.0.4 DeviceSupportUpdate.38 (1/19/2021)
 
Device Parameters

Manufacturer:Cypress (ID=1h)
Part Number:S25FL064LABNHV013 (ID=6017h)
8-bit Bytes:8389632
Memory Regions:0h-7F FFFFh; 80 0000h-80 00FFh; 80 0100h-80 01FFh; 80 0200h-80 02FFh; 80 0300h-80 03FFh
Vcc(program):3.6
Electrical Erase:Yes
Set programming:Yes
Packages:WSON(8)
 
Note

IMPORTANT: Algorithm support for this device selection is developed. Device samples are needed for QA testing and full release in BPWin. For information on how to obtain an expedited release of this device support, please contact BPM Microsystems at: Inside Sales 713--688-4600 inside_sales@bpmmicro.com Information on expected socket module support can be found our web page at: http://www.bpmmicro.com/find-your-device/ **Please note that receipt of device samples and QA testing must be completed before socket module support can be validated.
Device Type: Flash Memory
Device Size: 64 Mbit
Algorithm Programming method: Standard Single SPI

Memory Organization:
Memory Type

Attributes(*)

Included in default
Range (Y/N)
DUT Physical Byte Address(hex)
(if this area is selected/Activated)
BPWin Buffer Byte Address(hex)
Main Flash Area R/W/E Yes 0000_0000 - 007F_FFFF 0000_0000 - 007F_FFFF
SecSi sector R/W No 0080_0000 - 0080_03FF 0080_0000 - 0080_03FF
Default Algorithm Range --- --- 0000_0000 - 007F_FFFF 0000_0000 - 007F_FFFF
* R:Read only, W:One time programmable (OTP), R/W:readable and one time programmable (OTP), R/W/E:readable and rewritable if not locked. Any configurations listed under "Device-Specific" in the menu item Device-> Settings will be written to the DUT during "Program" operation regardless of memory range selection.
Special Device Considerations:
Configuration Register 3 (CR3NV) is not supported in this algorithm.
Configuration Register 2 (CR2NV) only supports programming the IO3_Reset and Output Impedance bits.
Erase must be selected if device to be programmed already has QE bit enabled.
There are four 256-Byte Security Registers with OTP locks independent from main memory.
mapped to[800000-8000FF],[800100-8001FF],[800200-8002FF],[800300-8003FF] in the Data Pattern respectively.
Lock bits LB[3:0] are onetime programmable(OTP).
 
= Supported
 
= This is a replacement daughter card that requires a base socket module
 Automated Production Programmers
Programmer Model:39004900
Algorithm Code Revision:1.01.0
 
WSON Socket Modules (Sorted by Performance)
FVE4ASMR08LAPG
FVE4ASM08LAPG
 Manual Production Programmers
Programmer Model:19002900
Algorithm Code Revision:1.01.0
 
WSON Socket Modules (Sorted by Performance)
FVE4ASMR08LAPG
FVE4ASM08LAPG
 
Copyright © 2021, BPM Microsystems
 
Last Updated: 01/14/2021