Device Support Summary For "Cypress S98FL512SDSMFBG00"

 
Generated by:BPWin V8.0.1 DeviceSupportUpdate.29 (3/27/2024)
 
Device Parameters

Manufacturer:Cypress (ID=179h)
Part Number:S98FL512SDSMFBG00 (ID=20h)
8-bit Bytes:67111056
Memory Regions:0h-1FF FFFFh; 200 0000h-3FF FFFFh; 400 0010h-400 03FFh; 400 0410h-400 07FFh; 400 0800h-400 087Fh; 400 0880h-400 088Fh
Vcc(program):3.6
Electrical Erase:Yes
Set programming:Yes
Packages:SOIC(16)
 
Note

IMPORTANT: 512M-bit Dual DIE Serial Flash. This algorithm uses Standard SPI mode to Program and Verify/Read the device. The status register bits can be set under Device Config > Configure . Erase must be selected if device to be programmed already has QE bit enabled. The default Device Range is set to [0000000h-3FFFFFFh]. DIE 1 is located in Buffer location[0000000h-1FFFFFFh] and DIE 2 is located in Buffer location[2000000h-3FFFFFFh]. Please modify the range under Device Config > Range if any of the Security Registers need to be included. The correct password value, located in the range [4000880h-4000887h] for DIE 1 and [4000888h-400088Fh] for DIE 2, may be read only after it is programmed and before the Password Mode has been selected by programming the Password Protection Mode bit to 0 in the ASP Register (ASP[2]). The OTP region is located in the range [4000000h-40003FFh] for DIE 1 and [4000400h-40007FFh] for DIE 2. The Factory Programmed 128-bit random number located at the beginning of the OTP region cannot be programmed, and data in this region will not be shown in the Buffer Editor. OTP Lock bits for DIE 1 are located in the Buffer location [4000010h-4000013h] and Reserved bits are located at [4000014h-400001Fh]. OTP Lock bits for DIE 2 are located in the Buffer location [4000410h-4000413h] and Reserved bits are located at [4000414h-400041Fh]. The device lock bits may be programmed in the data buffer at location [4000800h-400083Fh] for DIE 1 and [4000840h-40007Fh] for DIE 2. Each Group is divided into 64K Bytes of data. Boot sectors may only be locked in groups of 64K Bytes; thus, these sectors will make up 2 bits in a group (First two bits for bottom boot devices and Last two bits for top boot devices.) For example, PPB Group 1 for DIE 1 is located at [4000800h-4000801]. Setting it to FFFE will lock the address range [00000000h-0000FFFFh]. PPB Group 1 for DIE 2 is located at [4000840h-4000841]. Setting it to FFFE will lock the address range [02000000h-0200FFFFh]. Erase operation will clear the PPB bits at location [4000800h-400083Fh] for DIE 1 and [4000840h-40007Fh] for DIE 2.
 
= Supported
 
= This is a replacement daughter card that requires a base socket module
 
Automated Production Programmers

Programmer Model:3900490038004800
Algorithm Code Revision:1.21.21.21.2
 
SOIC Socket Modules
FVE4ASMR16SDA
 
Manual Production Programmers

Programmer Model:190029002800
Algorithm Code Revision:1.21.21.2
 
SOIC Socket Modules
FVE4ASMR16SDA
 
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Last Updated: 01/14/2021