Device Support Summary For "Infineon(Siemens) SAK-TC297TP-128F300S BB QS (Cached PFlash)"

 
Generated by:BPWin V7.0.7 DeviceSupportUpdate.100 (1/14/2022)
 
Device Parameters

Manufacturer:Infineon(Siemens)
Part Number:SAK-TC297TP-128F300S BB QS (Cached PFlash)
8-bit Bytes:2937068544
Memory Regions:8000 0000h-801F FFFFh; 8020 0000h-803F FFFFh; 8040 0000h-805F FFFFh; 8060 0000h-807F FFFFh; AF00 0000h-AF0B FFFFh; AF10 0000h-AF10 1BFFh
Vcc(program):1.3
Electrical Erase:Yes
Packages:LFBGA(292)
 
Note

IMPORTANT:
Device Type: AURIX 32-Bit Single-Chip Microcontroller
Device Size: 8 MByte PFlash Memory + 768 Kbytes DFlash Memory
Algorithm Programming Method: DAP

Memory Organization:
Memory Type

Attributes(*)

Included in default
Range (Y/N)
DUT Physical Byte Address(hex)
(if this area is selected/Activated)
BPWin Buffer Byte Address(hex)
PFlash0 (Cached) R/W/E Yes 8000_0000 - 801F_FFFF 8000_0000 - 801F_FFFF
PFlash1 (Cached) R/W/E Yes 8020_0000 - 803F_FFFF 8020_0000 - 803F_FFFF
PFlash2 (Cached) R/W/E Yes 8040_0000 - 805F_FFFF 8040_0000 - 805F_FFFF
PFlash3 (Cached) R/W/E Yes 8060_0000 - 807F_FFFF 8060_0000 - 807F_FFFF
DFlash0 DF_EEPROM R/W/E Yes AF00_0000 - AF0B_FFFF AF00_0000 - AF0B_FFFF
DFlash0 DF_UCB R/W/E No AF10_0000 - AF10_1BFF AF10_0000 - AF10_1BFF
Default Algorithm Range --- --- 8000_0000 - AF0B_FFFF 8000_0000 - AF0B_FFFF
* R:Read only, W: One time programmable (OTP), R/W: readable and one time programmable (OTP), R/W/E: readable and rewritable if not locked. Any configurations listed under "Device-Specific" in the menu item Device-> Settings will be written to the DUT during "Program" operation regardless of memory range selection.
Special Device Considerations:
1. This algorithm only supports UCB0-UCB6.
UCB2 and UCB3 are OTP.
UCB4 is factory set and is not programmable.
2. When reading a blank logical sector, there may be bit errors due to unprogrammed ECC.
 
= Supported
 
= This is a replacement daughter card that requires a base socket module
 
Automated Production Programmers

Programmer Model:3900490038004800
Algorithm Code Revision:1.01.01.01.0
 
LFBGA Socket Modules (Sorted by Performance)
FVE2ASMR292LFBGC
FVE2ASMR292LFBGB
 
Manual Production Programmers

Programmer Model:190029002800
Algorithm Code Revision:1.01.01.0
 
LFBGA Socket Modules (Sorted by Performance)
FVE2ASMR292LFBGC
FVE2ASMR292LFBGB
 
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Last Updated: 03/03/2021